| Monday, September 23 | |
| 8:30-9:30 | KEYNOTE: Parallelism in
Mainstream Enterprise Platforms of the Future
( slides ) Dr. Dileep Bhandarkar |
| 9:30-10:00 | BREAK |
| 10:00-11:30 | SESSION 1: Data Parallelism and Threading An Evaluation of Data-Parallel Compiler Support for Line-Sweep Applications (slides) Daniel Chavarria-Miranda and John Mellor-Crummey Increasing and Detecting Memory Address Congruence (slides) Samuel Larsen, Emmett Witchell, and Saman Amarasinghe Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread Performance (slides) Gautham K. Dorai and Donald Yeung |
| 11:30-1:00 | LUNCH |
| 1:00-2:30 | SESSION 2: Compiler Support for Architecture Compiler-Controlled Caching in Superword Register Files for Multimedia Extension Architectures (slides) Jaewook Shin, Jacqueline Chame, and Mary W. Hall Effective Compilation Support for Variable Instruction Set Architecture (slides) Jack Liu, Tim Kong, and Fred Chow A Framework for Parallelizing Load/Stores on Embedded Processors (slides) Xiaotong Zhuang, Santosh Pande, and John S. Greenland, Jr. |
| 2:30-3:00 | BREAK |
| 3:00-4:30 | SESSION 3: Program Characterization Workload Design: Selecting Representative Program-Input Pairs (slides) Lieven Eeckhout, Hans Vandierendonck, and Koen De Bosschere Dataflow Frequency Analysis based on Whole Program Paths (slides) Bernhard Scholz and Eduard Mehofer Quantifying Instruction Criticality (slides) Eric S. Tune, Dean M. Tullsen, and Brad Calder |
| 4:30-5:30 | BREAK |
| 5:30-6:30 | SPECIAL SESSION: Works in Progress
in the Dome Room in the U.Va. Rotunda |
| 6:30 - | Grounds tour and reception at the U.Va. Colonnade Club |
| Tuesday, September 24 | |
| 8:30-9:30 | KEYNOTE: The role of
Computational Science in Energy Efficiency and Renewable Energy.
(slides) Dr. Steve Hammond |
| 9:30-10:00 | BREAK |
| 10:00-11:30 | SESSION 4: Power Application Transformations for Energy and Performance-Aware Device Management (slides) Taliver Heath, Eduardo Pinheiro, Jerry Hom, Ulrich Kremer, and Ricardo Bianchini Leakage Energy Management in Cache Hierarchies (slides) Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut Kandemir, Mary Jane Irwin, and Anand Sivasubramaniam Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power (slides) Steve Dropsho, Alper Buyuktosunoglu, Rajeev Balasubramonian, David H. Albonesi, Sandhya Dwarkadas, Greg Semeraro, Grigorios Magklis, and Michael L. Scott |
| 11:30-1:00 | LUNCH |
| 1:00-2:00 | SESSION 5: Prediction The Use of Prediction for Accelerating Upgrade Misses in cc-NUMA Multiprocessors (slides) Manuel E. Acacio, Jose Gonzalez, Jose M. Garcia, and Jose Duato Predicting Conditional Branches With Fusion-Based Hybrid Predictors (slides) Gabriel Loh and Dana S. Henry |
| 2:00-2:30 | BREAK |
| 2:30-4:00 | SESSION 6: Memory Performance Speculative Sequential Consistency with Little Custom Storage (slides) Chris Gniady and Babak Falsafi Cost-Effective Compiler Directed Memory Prefetching and Bypassing (slides) Daniel Ortega, Eduard Ayguade, Jean-Loup Baer, and Mateo Valero Using the Compiler to Improve Cache Replacement Decisions (slides) Zhenlin Wang, Kathryn S. McKinley, Arnold L. Rosenberg, and Charles C. Weems |
| 4:00-4:30 | BREAK |
| 4:30-6:00 | SESSION 7: Memory Aliasing Software Bubbles: Using Predication to Compensate for Aliasing in Software Pipelines (slides) Benjamin Goldberg, Emily Crutcher, Chad Huneycutt, and Krishna Palem Speculative Alias Analysis for Executable Code (slides) Manel Fernandez and Roger Espasa Cost Effective Memory Dependence Prediction Using Speculation Levels and Color Sets (slides) Soner Onder |
| 7:00 - | Banquet |
| Wednesday, September 25 | |
| 8:30-9:30 | KEYNOTE:
The Computational Grid: Aggregating Performance and Enhanced
Capability from Federated Resources
(slides)
Dr. Rich Wolski |
| 9:30-10:00 | BREAK |
| 10:00-11:00 | SESSION 8: Java and IA-64 Just-In-Time Java Compilation for the Itanium Processor (slides) Tatiana Shpeisman, Guei-Yuan Lueh, and Ali-Reza Adl-Tabatabai Eliminating Exception Constraints in Java on IA-64 (slides) Kazuaki Ishizaki, Tatsushi Inagaki, Hideaki Komatsu, and Toshio Nakatani |
| 11:00-11:30 | BREAK |
| 11:30-1:00 | SESSION 9: Clusters Optimizing Loop Performance for Clustered VLIW Architectures (slides) Yi Qian, Steve Carr, and Philip Sweany Exploiting Pseudo-schedules to Guide Data Dependence Graph Partitioning (slides) Alex Aleta, Josep Maria Codina, and Francisco Jesus Sanchez, Antonio Gonzalez, and David Kaeli Efficient Interconnects for Clustered Microarchitectures (slides) Joan-Manuel Parcerisa, Julio Sahuquillo, Antonio Gonzalez, and Jose Duato |
| 1:00-1:15 | WRAPUP |