LCTES Invited Talks
Marc Campbell, Northrop Grumman, USA, ``Evaluating ASIC, DSP, and RISC
Architectures for Embedded Applications''
Mathematical analysis and empirical evaluation, based on solid state
physical behavior, identifies a Architecture-Technology Metric for
measuring the relative specialization of ASIC, DSP, and RISC
architectures for embedded applications. Relationships are examined
which can help predict relative future architecture performance as new
generations of CMOS solid state technology become available. In
particular, Performance/Watt is shown to be an Architecture-Technology
Metric which can be used to calibrate ASIC, DSP, & RISC performance
density potential relative to a solid state technology generations,
measure & evaluate architectural changes, and project a architecture
performance density roadmap.